? semiconductor components industries, llc, 2007 may, 2007 - rev. 0 publication order number: NUS3116MT/d NUS3116MT main switch power mosfet and dual charging bjt -12 v, -6.2 a, cool single p-channel with dual pnp low v ce(sat) transistors, 3x3mm wdfn package this device integrates one high performance power mosfet and two low v ce(sat) transistors, greatly reducing the layout space and optimizing charging performance in the battery-powered portable electronics. features ? high performance power mosfet ? dual-low v ce(sat) transistors as charging power mux ? 3.0x3.0x0.8 mm wdfn package ? independent pin-out provides circuit flexibility ? low profile (<0.8 mm) for easy fit in thin environments ? this is a pb-free device applications ? main switch and battery charging mux for portable electronics ? optimized for commercial pmus from top suppliers (see figure 2) 8 7 6 5 1 2 3 4 d c figure 1. simple schematic cool ? 3x3 pin connections (top view) v ceo max v ebo max i c max low v ce(sat) pnp (wall) -8.0 v -30 v -2.0 a dfn8 case 506bc device package shipping ? ordering information 3116 = device code a = assembly location y = year ww = work week = pb-free package marking diagram 3116 ayww 1 ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. NUS3116MTr2g wdfn8 (pb-free) 3000/tape & reel http://onsemi.com (note: microdot may be in either location) 1 8 v (br)dss r ds(on) typ i d max mosfet 32 m @ -4.5 v -12 v 44 m @ -2.5 v -6.2 a v ceo max v ebo max i c max low v ce(sat) pnp (usb) -8.0 v -30 v -2.0 a
NUS3116MT http://onsemi.com 2 p-channel power mosfet maximum ratings (t j = 25 c unless otherwise stated) parameter symbol value units drain-to-source voltage v dss -12 v gate-to-source voltage v gs 8.0 v continuous drain current (note 1) steady state t a = 25 c i d -5.47 a t a = 85 c -4.0 t 5 s t a = 25 c -6.2 power dissipation (note 1) steady state t a = 25 c p d 1.7 w t 5 s 2.2 continuous drain current (note 2, minimum pad) steady state t a = 25 c i d -4.4 a t a = 85 c -3.2 power dissipation (note 2) t a = 25 c p d 1.14 w pulsed drain current t p = 10 s i dm -25 a operating junction and storage temperature t j , t stg -55 to 150 c source current (body diode) 2 i s -2.8 a lead temperature for soldering purposes (1/8 from case for 10 s) t l 260 c thermal resistance ratings parameter symbol max units junction-to-ambient C steady state (note 2) r ja 110 c/w junction-to-ambient C t < 10 s (note 2) r ja 56 c/w junction-to-ambient C steady state (note 1) r ja 72 c/w junction-to-ambient C t < 10 s (note 1) r ja 40 c/w stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. surface-mounted on fr4 board using 1 in sq pad size (cu area = 1.127 in sq [1 oz] including traces) 2. surface-mounted on fr4 board using the minimum recommended pad size of 0.5 in sq, 1 oz. cu. p-channel mosfet electrical characteristics (t j = 25 c unless otherwise specified) parameter symbol test condition min typ max units off characteristics drain-to-source breakdown voltage v (br)dss v gs = 0 v, i d = -250 a -12.0 v drain-to-source breakdown voltage temperature coefficient v (br)dss /t j i d = -250 a, ref to 25 c -10.1 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = -12 v t j = 25 c -1.0 a t j = 125 c -10 gate-to-source leakage current i gss v ds = 0 v, v gs = 8 v 200 na on characteristics (note 3) gate threshold voltage v gs(th) v gs = v ds , i d = -250 a -0.45 -0.67 -1.1 v negative threshold temperature coefficient v gs(th) /t j 2.68 mv/ c drain-to-source on resistance r ds(on) v gs = -4.5 v, i d = -3.0 a 32 40 m v gs = -2.5 v, i d = -3.0 a 44 50 forward transconductance g fs v ds = -16 v, i d = -3.0 a 5.9 s 3. pulsed condition: pulse width = 300 sec, duty cycle 2%
NUS3116MT http://onsemi.com 3 p-channel mosfet electrical characteristics (t j = 25 c unless otherwise specified) parameter units max typ min test condition symbol charges, capacitances and gate resistance input capacitance c iss v gs = 0 v, f = 1.0 mhz, v ds = -12 v 1329 pf output capacitance c oss 200 reverse transfer capacitance c rss 116 total gate charge q g(tot) v gs = -4.5 v, v ds = -12 v, i d = -3.0 a 13 nc threshold gate charge q g(th) 1.5 gate-to-source charge q gs 2.2 gate-to-drain charge q gd 2.9 switching characteristics turn-on delay time t d(on) v gs = -4.5 v, v dd = -12 v, i d = -3.0 a, r g = 3.0 8 ns rise time t r 17.5 turn-of f delay time t d(off) 80 fall time t f 56.5 drain-source diode characteristics forward recovery voltage v sd v gs = 0 v, i s = -1.0 a t j = 25 c -0.66 -1.2 v t j = 125 c -0.54 reverse recovery time t rr v gs = 0 v, disd/dt = 100 a/ s, i s = -1.0 a 70.8 ns charge time t a 14.3 discharge time t b 56.4 reverse recovery charge q rr 44 nc 3. pulsed condition: pulse width = 300 sec, duty cycle 2% dual-pnp transistors maximum ratings (t j = 25 c unless otherwise stated) parameter symbol value units collector-emitter voltage v ceo -30 v collector-base voltage v cbo -30 v emitter-base voltage v ebo -8.0 v collector current, continous i c -2.0 a collector current, pulsed (note 4) i c -6.0 a operating junction and storage temperature t j , t stg -55 to 150 c thermal resistance dissipation p d 1.5 w thermal resistance (note 5) r ja 83 c/w thermal resistance dissipation p d 810 mw thermal resistance (note 6) r ja 155 c/w 4. single pulse: pulse width = 1 ms 5. surface-mounted on fr4 board using 1 in sq pad size (cu area = 1.127 in sq [1 oz] including traces) 6. surface-mounted on fr4 board using the minimum recommended pad size of 100 mm 2 , 1 oz. cu.
NUS3116MT http://onsemi.com 4 dual-pnp transistors electrical characteristics (t j = 25 c unless otherwise stated) parameter symbol test condition min typ max units off characteristics collector-emitter voltage v ceo i c = -10 ma, i b = 0 -30 v collector-base voltage v cbo i c = -0.1 ma, i e = 0 -30 v emitter-base voltage v ebo i e = -0.1 ma, i c = 0 -8.0 v collector-emitter cutoff current i ces v ces = -30 v -0.1 a on characteristics dc current gain (note 7) h fe i c = -1.0 a, v ce = -2.0 v 100 200 - dc current gain (note 7) h fe i c = -2.0 a, v ce = -2.0 v 100 200 - collector-emitter saturation voltage v ce(sat) i c = -1.0 a, i b = -0.01 a 0.22 v collector-emitter saturation voltage v ce(sat) i c = -1.0 a, i b = -0.1 a 0.12 v collector-emitter saturation voltage v ce(sat) i c = -2.0 a, i b = -0.2 a 0.24 v input capacitance c ibo v eb = -0.5 v, f = 1.0 mhz 240 400 pf output capacitance c obo v cb = -3.0 v, f = 1.0 mhz 50 100 pf 7. pulsed condition: pulse width = 300 sec, duty cycle 2% figure 2. typical application circuit main battery bat_fet_n usb_ctl chr_ctl r_sns from wall from usb supply voltage v dd 8 7 6 5 1 2 3 4 d c
NUS3116MT http://onsemi.com 5 typical characteristics - mosfet figure 3. on-region characteristics figure 4. transfer characteristics -v ds , drain-to-source voltage (v) -v gs , gate-t o-source voltage (v) 6 5 4 3 2 1 0 0 1 2 3 4 5 6 2.0 1.5 1.0 0.5 0 1 2 3 4 5 6 figure 5. on-resistance vs. drain current figure 6. on-resistance vs. drain current and gate voltage -i d , drain current (a) -i d , drain current (a) 6 5 4 3 2 1 0.02 0.03 0.04 0.05 6 5 4 3 2 1 0.02 0.03 0.04 0.05 figure 7. on-resistance variation with temperature figure 8. drain-to-source leakage current vs. voltage t j , junction temperature ( c) -v ds , drain-to-source voltage (v) 125 100 75 50 25 0 -25 -50 0.6 0.8 1.0 1.2 1.4 1.6 12 10 8 6 4 2 100 1,000 10,000 -i d , drain current (a) -i d , drain current (a) r ds(on) , drain-to-source resistance ( ) r ds(on) , drain-to-source resistance ( ) r ds(on) , drain-to-source resistance (normalized) -i dss , leakage (na) t j = 25 c v gs = -1.4 v -1.5 v -1.6 v -1.7 - -8.0 v v ds -10 v v gs = 4.5 v t j = 100 c t j = 25 c t j = -55 c t j = 100 c t j = 25 c t j = -55 c v gs = -2.5 v t j = 25 c v gs = -4.5 v 150 i d = -3 a v gs = -4.5 v t j = 150 c t j = 100 c v gs = 0 v
NUS3116MT http://onsemi.com 6 typical characteristics - mosfet figure 9. capacitance variation figure 10. gate-to-source and drain-to-source voltage vs. total charge gate-t o-source or drain-to-source voltage (v) q g , total gate charge (nc) 12 8 6 4 2 0 -2 -4 0 400 800 1200 1600 2000 2400 2800 14 12 10 8 6 4 2 0 0 1 2 3 4 5 6 figure 11. resistive switching time variation vs. gate resistance figure 12. diode forward voltage vs. current r g , gate resistance ( ) -v sd , source-to-drain voltage (v) 100 10 1 1 10 100 1,000 1.0 0.8 0.6 0.4 0.2 0 0.01 0.1 1 10 figure 13. maximum rated forward biased safe operating area -v ds , drain-to-source voltage (v) 100 10 1 0.1 0.01 0.1 1 10 100 c, capacitance (pf) -v gs , gate-t o-source voltage (v) t, time (ns) -i s , source current (a) -i d , drain current (a) 10 t j = 25 c v ds = 0 v c iss c rss c oss i d = -3 a t j = 25 c t d(off) t d(on) t f t r v gs = 0 v t j = 25 c t j = 150 c t j = -55 c 100 s 1 ms 10 ms dc mounted on 2 sq. fr4 board (0.5 sq. 2 oz. cu single sided) with mosfet die operating. single pulse t c = 25 c r ds(on) limit thermal limit package limit v dd = -12 v i d = -3.0 a v gs = -4.5 v q t v ds v gs q gd q gs 12 10 8 6 4 2 0 -v ds , drain-to-source voltage (v) c iss v gs = 0 v -v gs -v ds
NUS3116MT http://onsemi.com 7 typical characteristics - mosfet figure 14. fet thermal response t, time (s) 1e+00 1e-01 1e-03 1e-04 1e-02 1e-05 1e-06 0.001 0.01 0.1 1 r ja , effective transient thermal response 1e+01 1e+02 1e+03 single pulse d = 0.5 0.2 0.1 0.05 0.02 0.01
NUS3116MT http://onsemi.com 8 typical characteristics - bjt figure 15. collector emitter saturation voltage vs. collector current figure 16. collector emitter saturation voltage vs. collector current i c , collector current (a) 10 1 0.1 0.01 0.001 0 0.05 0.10 0.35 0.40 0.45 0.55 0.60 figure 17. dc current gain vs. collector current figure 18. base emitter saturation voltage vs. collector current i c , collector current (a) i c , collector current (a) 10 1 0.1 0.01 0.001 75 125 175 325 375 625 675 725 10 1 0.1 0.01 0.001 0.2 0.3 0.4 0.5 0.6 0.8 0.9 1.0 figure 19. base emitter turn-on voltage vs. collector current figure 20. saturation region i b , base current (ma) 100 10 1 0.1 0.01 0 0.2 0.4 0.6 0.8 1.0 v ce(sat) , collector emitter saturation voltage (v) h fe , dc current gain v be(sat) , base emitter saturation voltage (v) v ce , collector-emitter voltage (v) 0.50 0.15 0.20 0.25 0.30 t j = 25 c ic/ib = 100 ic/ib = 10 i c , collector current (a) 10 1 0.1 0.01 0.001 0 0.05 0.10 0.35 0.40 0.45 0.55 0.60 v ce(sat) , collector emitter saturation voltage (v) 0.50 0.15 0.20 0.25 0.30 ic/ib = 100 -55 c 25 c 150 c 225 275 425 475 525 575 150 c (2.0 v) 25 c (2.0 v) -55 c (2.0 v) 0.7 ic/ib = 100 -55 c 25 c 150 c i c , collector current (a) 10 1 0.1 0.01 0.001 0.2 0.3 0.4 0.5 0.6 0.8 0.9 1.0 v be(on) , base emitter turn-on voltage (v) 0.7 v ce = -1.0 v -55 c 25 c 150 c 500 ma 300 ma 100 ma 10 ma
NUS3116MT http://onsemi.com 9 typical characteristics - bjt figure 21. input capacitance figure 22. output capacitance v eb , emitter base voltage (v) v cb , collector base voltage (v) 7 6 5 4 3 2 1 0 100 125 150 175 200 250 275 300 40 30 25 20 15 10 5 0 20 30 40 50 60 70 80 90 c ibo , input capacitance (pf) c obo , output capacitance (pf) 225 35 45
NUS3116MT http://onsemi.com 10 package dimensions dfn8, 3x3, 0.65p case 506bc-01 issue o notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30mm. 4. coplanarity applies to the exposed pad as well as the terminals. a b e d d2 e2 bottom view b e 8x 0.10 b 0.05 a c c k 8x note 3 2x 0.10 c pin one reference top view 2x 0.10 c 8x a a1 (a3) 0.05 c 0.05 c c seating plane side view l 8x 14 5 8 2x d3 dim min max millimeters a 0.70 0.80 a1 0.00 0.05 a3 0.20 ref b 0.25 0.35 d 3.00 bsc d2 1.00 1.20 e 3.00 bsc e2 1.70 1.90 e 0.65 bsc k 0.20 --- l 0.25 0.45 style 1: pin 1. emitter1 2. emitter2 3. collector 4. source 5. drain 6. gate 7. base2 8. base1 ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? 1 0.65 pitch 3.30 1.10 *for additional information on our pb-free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 8x dimensions: millimeters d3 0.95 1.15 g2 0.15 ref g3 0.20 ref 1.28 1.15 g3 g2 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, represent ation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. typical parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including typicals must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800-282-9855 toll free ?usa/canada europe, middle east and africa technical support: ?phone: 421 33 790 2910 japan customer focus center ?phone: 81-3-5773-3850 NUS3116MT/d literature fulfillment : ?literature distribution center for on semiconductor ?p.o. box 5163, denver, colorado 80217 usa ? phone : 303-675-2175 or 800-344-3860 toll free usa/canada ? fax : 303-675-2176 or 800-344-3867 toll free usa/canada ? email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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